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Latch1-D input
CLK
CLK'
Latch1-Q to Latch2-D
+5 V wire
0 V wire
Latch1-D LED with resistor
Latch2-Q LED with resistor
Latch1-D
CLK
+5 V
Latch2-D
Latch1-Q
CLK'
0 V
Latch2-Q
LATCH 1
LATCH 2
Latch1-D
CLK
+5 V
Latch2-D
Latch1-Q
CLK'
0 V
Latch2-Q
Test the D Flip-Flop
Choose D, apply a clock pulse, or activate Q′ feedback and the repeating clock.
D
0
CLK
0
Q
0
Set D to 1
Generate Clock Pulse
Loop: Off
Clock period
1 second
0.5 second
0.25 second
Clock Signal: Off
Reset Test
Loop behavior:
When Loop is on, Q′ is connected to D. Each active clock pulse therefore toggles Q.
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